The present disclosure relates to high-speed Input/Output (IO) interface communication and more specifically, to calibration on high-speed IO interfaces.
With the increasing complexity of integrated circuits, high-performance data processing applications are driving a demand for data transmission working in the gigahertz range. Simultaneously, a corresponding high-performance bus interface technology is being developed to meet the needs between processors and systems. Conventional interface speed increases may result in signal degradation caused by time dispersion, reflections, and undesired environment condition fluctuations.